The hiring process at Cadence Design Systems takes an average of 14 days when considering 1 user submitted interviews across all job titles. Candidates applying for Digital IC Verification Intern had the quickest hiring process (on average 14 days), whereas Digital IC Verification Intern roles had the slowest hiring process (on average 14 days).
I interviewed at Cadence Design Systems (Bengaluru)
Interview
It was on campus placement. Resume shortlisting was done and then direct interview was scheduled(no written test). Two rounds of interview an hour each. Both the rounds were technical and mostly focused on systemverilog and verification.
Interview started with the interviewer asking me to introduce myself, then started asking basic questions on digital design, RC circuits, analog electronics, and verilog, gave enough time to answer them
I applied online. The process took 1 week. I interviewed at Cadence Design Systems (Haifa) in Jan 2025
Interview
I had one interview with two team members.
I had 2 technical questions.
The first one was a classic leetcode question.
Then they tried to understand if I know the basics of object oriented language and inheritance and polymorphism concepts.
After that I was given a question in C++, given a specific class and asked to implement some funcs of this class.
It was mainly about graphs concepts and implementations of it.
Interview questions [1]
Question 1
given a string, find the longest substring that starts and ends in the same letter