The hiring process at Cadence Design Systems takes an average of 14 days when considering 1 user submitted interviews across all job titles. Candidates applying for Digital IC Verification Intern had the quickest hiring process (on average 14 days), whereas Digital IC Verification Intern roles had the slowest hiring process (on average 14 days).
3-4 rounds of interview with the hiring manager and other team members. All scheduled on same day. It was a fully technical interview. No heads up about the people who were going to interview until the interview started.
Interview questions [1]
Question 1
Experience in writing RTL in the past Some hands on RTL writing
Being referred and four interviews back to back. Three technical interviews and one interview chatting with manager. Technical interviews mostly about C++, not too many questions about data structure or algo. Got the offer two days later.
I applied through college or university. I interviewed at Cadence Design Systems (Āgra, Uttar Pradesh) in Aug 2022
Interview
Written test followed by interview.In written test they ask gate problems related to electronics also they have a section for apitude .Difficulty of paper is nice but if a person really study these things then hecan clear it at ease.In interview they ask how you solve each question in the written exam they also guide you and give hints to proceed further in questions.