I had a phone screen - basic SV and UVM multiple choice questions. Second round - OOPs concepts, some verification concepts (types of coverage, stimulus).
Asic Design Engineer Interview Questions
811 asic design engineer interview questions shared by candidates
System verilog, UVM scoreboard/monitor coding
Detect that N numbers have arrived based on a control signal. Flag the average of all the N numbers once the N-numbers have arrived.
Clocking and timing analysis about a register circuit.
No real difficul question. I assumed I d ok, though I ddn't te any feedback during te interview.
Sequence identification circuit design
Number of bits representation for a given math function
IO Budget / Timing: Since I was out of touch on this topic, I was not very well prepared on this. But I think I handled it well Also, was surprised to see a question like: How many ping pong balls would you need to fill up a 20X20 meeting room? etc. The idea was to see more on how I'd approach the problem and not necessarily give the right answer.
Design a Verilog module that generates the perfect squares of natural numbers starting from 4.
Describe how you solved a problem on a project
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