WPE, Poly Nwell cap Operation, LDO working and things to take care of.
Layout Interview Questions
426 layout interview questions shared by candidates
CMOS fabrication inverter layout Multi by concept
1)What is Electromigration and how would ou resolve it? 2)What is ESD and how would ou fix it? 3) Some questions related to Clock Tree synthesis and timing. 4)Layout designing technique questions related to metal stacking, power rails, power aand timing optimization in analog layouts. 5)What is a latch-up condition and how would you fix it? 6)Difference between latches and flip flops and scenarios where they can be used. 7)Floorplanning strategies and questions related to particular process node layouts.(7 nm and 16 nm in my case.)
Describe the inverter transfer characteristics?
Resource management and Unplanned task pipe-lining.
Layout basics, . . .
Hoe zou je jezelf omschrijven?
Inverter functionality.
I was mainly asked to do a portfolio walk-through
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