basics of cmos inverter, digital circuits, verilog, RTL to GDSll flow.
Soc Analyst Interview Questions
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Pipelining and Hazards
Program to differentiate even and odd number Draw and explain NOT and NAND gate Draw a stick diagram for NOT gate Find ways to make NAND gate a NOT gate Explain methods of verifying your design, such as DFT Scan path.
FIFO Depth, SV assertions, Multi-threading and OOP concepts
1. Few questions on writing constraints for certain scenarios. 2. FSM for number divisible by 3 3. UVM subscriber, sequences, TLM ports and FIFO. 4. write code for random number generation for given distribution and ranges. 5. byte addressing in an integer memory system. 6. constrain for non-overlapping segment-addresses generation. 7. Explain any testbench architecture you have worked on. 8. Lots of simple questions to test SystemVerilog and OOP concepts.
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