What assertions did I write to verify functionality of my SV projects? Sequence detector 10110? What is FSM-D?
Verification Interview Questions
3,721 verification interview questions shared by candidates
They asked about uvm fundamentals. They were looking for strong uvm experience and asked me to write code for scoreboard, monitor and asked about how to connect them.
Medium assertions questions. They were related to grant
difference of Union and Struct (C++). VIPT cache.
How to do the formal verification for a given module
pipeling and harzard.
What is the difference of function and task in verilog
There are block box modules, and you know nothing about what they are doing, behaior, output, input. Can you create a verification TB for it?
working independently then with team. Ease with translation for others and internet research. A lot of confidentiality.
What's your name , is it [name] ?
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